Accepted papers

  • Fixed-Priority Memory-Centric Scheduler for COTS-based Multiprocessors
    Gero Schwäricke, Tomasz Kloda, Giovani Gracioli, Marko Bertogna, and Marco Caccamo
  • CPU Energy-Aware Parallel Real-Time Scheduling
    Abusayeed Saifullah, Sezana Fahmida, Venkata P. Modekurthy, Nathan Fisher, and Zhishan Guo
  • PAStime: Progress-aware Scheduling for Time-critical Computing
    Soham Sinha, Richard West, and Ahmad Golchin
  • Dynamic Interference-sensitive Run-time Adaptation of Time-Triggered Schedules
    Stefanos Skalistis and Angeliki Kritikakou
  • Improving the accuracy of cache-aware response time analysis using preemption partitioning
    Filip Markovic, Jan Carlson, Sebastian Altmeyer, and Radu Dobrin
  • Nested, but Separate: Isolating Unrelated Critical Sections in Real-Time Nested Locking
    James Robb and Björn B. Brandenburg
  • The Safe and Effective Use of Learning-Enabled Components in Safety-Critical Systems
    Kunal Agrawal, Sanjoy Baruah, and Alan Burns
  • Attack detection through monitoring of timing deviations in embedded real-time systems
    Nicolas Bellec, Simon Rokicki, and Isabelle Puaut
  • Demystifying the Real-Time Linux Scheduling Latency
    Daniel Bristot de Oliveira, Daniel Casini, Rômulo Silva de Oliveira, and Tommaso Cucinotta
  • AMD GPUs as an Alternative to NVIDIA for Supporting Real-Time Workloads
    Nathan Otterness and James H. Anderson
  • Turning Futexes Inside-Out: Efficient and Deterministic User Space Synchronization Primitives for Real-Time Systems with IPCP
    Alexander Zuepke
  • Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs
    Francesco Restuccia, Marco Pagani, Alessandro Biondi, Mauro Marinoni, and Giorgio Buttazzo
  • On How to Identify Cache Coherence: Case of the NXP QorIQ T4240
    Nathanaël Sensfelder, Julien Brunel, and Claire Pagetti
  • Simultaneous Multithreading and Hard Real Time: Can it be Safe?
    Sims Hill Osborne and James H. Anderson
  • Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study
    Xavier Palomo, Mikel Fernandez, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, and Laurent Rioux
  • Discriminative Coherence: Balancing Performance and Latency Bounds in Data-sharing Multi-Core Real-Time Systems
    Mohamed Hassan
  • Impact of AS6802 synchronization protocol on Time-Triggered and Rate-Constrained traffic
    Anaïs Finzi and Luxi Zhao
  • Offloading Safety- and Mission-Critical Tasks via Unreliable Connections
    Lea Schönberger, Georg von der Brüggen, Kuan-Hsun Chen, Benjamin Sliwa, Hazem Youssef, Aswin Ramachandran, Christian Wietfeld, Michael ten Hompel, and Jian-Jia Chen
  • The Time-Triggered Wireless Architecture
    Romain Jacob, Licong Zhang, Marco Zimmerling, Jan Beutel, Samarjit Chakraborty, and Lothar Thiele
  • Evaluation of the Age Latency of a Real-Time Communicating System using the LET paradigm
    Alix Munier Kordon and Ning Tang
  • Control-System Stability under Consecutive Deadline Misses Constraints
    Martina Maggio, Arne Hamann, Eckart Mayer-John, and Dirk Ziegenbein
  • Abstract Response-Time Analysis: A Formal Foundation for the Busy-Window Principle
    Sergey Bozhko and Björn B. Brandenburg
  • Analysis of Memory-Contention in Heterogeneous COTS MPSoCs
    Mohamed Hassan and Rodolfo Pellizzoni
  • smARTflight: An Environmentally-Aware Adaptive Real-Time Flight Management System
    Anam Farrukh and Richard West

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