Publications

Edited

1. International Workshop on Worst-Case Execution Time Analysis, WCET 2017, Dubrovnik, Croatia
   J. Reineke.
   [url]  [bib]
   

   @proceedings{Reineke17,
     editor    = {Jan Reineke},
     title     = {17th International Workshop on Worst-Case Execution Time Analysis,
                  {WCET} 2017, June 27, 2017, Dubrovnik, Croatia},
     series    = {{OASICS}},
     volume    = {57},
     publisher = {Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik},
     year      = {2017},
     url       = {http://www.dagstuhl.de/dagpub/978-3-95977-057-6},
     isbn      = {978-3-95977-057-6},
     timestamp = {Mon, 26 Jun 2017 10:56:02 +0200},
     biburl    = {http://dblp.uni-trier.de/rec/bib/conf/wcet/2017},
     bibsource = {dblp computer science bibliography, http://dblp.org}
   }
   

2. International Conference on Embedded Software, EMSOFT 2014, New Delhi, India
   T. Mitra and J. Reineke.
   [bib]
   

   @proceedings{Mitra14,
     editor    = {Tulika Mitra and
                  Jan Reineke},
     title     = {2014 International Conference on Embedded Software, {EMSOFT} 2014,
                  New Delhi, India, October 12-17, 2014},
     publisher = {{ACM}},
     year      = {2014},
     url       = {http://doi.acm.org/10.1145/2656045},
     doi       = {10.1145/2656045},
   }
   

Journal Papers

1. On the Incomparability of Cache Algorithms in Terms of Timing Leakage
   P. Cañones, B. Köpf, and J. Reineke
   Logical Methods in Computer Science, 2019. [pdf]  [bib]
   

   @article{Canones19,
     TITLE = {On the Incomparability of Cache Algorithms in Terms of Timing Leakage},
     AUTHOR = {Cañones, Pablo and Köpf, Boris and Reineke, Jan},
     URL = {https://lmcs.episciences.org/5253},
     DOI = {},
     JOURNAL = {{Logical Methods in Computer Science}},
     VOLUME = {{Volume 15, Issue 1}},
     YEAR = {2019},
     MONTH = Mar,
     KEYWORDS = {Computer Science - Cryptography and Security},
   }

2. Basic Problems in Multi-View Modeling
   J. Reineke, C. Stergiou, and S. Tripakis
   Software & Systems Modeling, 18(3) 2019. [doi]  [bib]
   

   @article{Reineke19,
     author    = {Jan Reineke and
                  Christos Stergiou and
                  Stavros Tripakis},
     title     = {Basic problems in multi-view modeling},
     journal   = {Software and System Modeling},
     volume    = {18},
     number    = {3},
     pages     = {1577--1611},
     year      = {2019},
     url       = {https://doi.org/10.1007/s10270-017-0638-1},
     doi       = {10.1007/s10270-017-0638-1},
   }

3. The Semantic Foundations and a Landscape of Cache-Persistence Analyses
   J. Reineke
   Leibniz Transactions on Embedded Systems, 2018. [doi]  [bib]
   

   @article{Reineke18a,
     author    = {Jan Reineke},
     title     = {The Semantic Foundations and a Landscape of Cache-Persistence Analyses},
     journal   = {{LITES}},
     volume    = {5},
     number    = {1},
     pages     = {03:1--03:52},
     year      = {2018},
     url       = {https://doi.org/10.4230/LITES-v005-i001-a003},
     doi       = {10.4230/LITES-v005-i001-a003},
   }

4. Checking multi-view consistency of discrete systems with respect to periodic sampling abstractions
   M. Pittou, P. Manolios, J. Reineke, and S. Tripakis
   Science of Computer Programming, 2018. [doi]  [bib]
   

   @article{Pittou2018,
   author = "Maria Pittou and Panagiotis Manolios and Jan Reineke and Stavros Tripakis",
   title = "Checking multi-view consistency of discrete systems with respect to periodic sampling abstractions",
   journal = "Science of Computer Programming",
   volume = "167",
   pages = "1 - 24",
   year = "2018",
   issn = "0167-6423",
   doi = "https://doi.org/10.1016/j.scico.2018.07.003",
   url = "http://www.sciencedirect.com/science/article/pii/S0167642318302612",
   keywords = "Multi-view modeling, View consistency, Formal methods, Modeling, Verification"
   }

5. An Extensible Framework for Multicore Response Time Analysis
   R. Davis, S. Altmeyer, L. Indrusiak, C. Maiza, V. Nelis, and J. Reineke
   Real-Time Systems, July 2018. [doi]  [bib]
   

   @Article{Davis18a,
   	author="Davis, Robert I.
   		and Altmeyer, Sebastian
   		and Indrusiak, Leandro S.
   		and Maiza, Claire
   		and Nelis, Vincent
   		and Reineke, Jan",
   	title="An extensible framework for multicore response time analysis",
   	journal="Real-Time Systems",
   	year="2018",
   	month="Jul",
   	day="01",
   	volume="54",
   	number="3",
   	pages="607--661",
   	abstract="In this paper, we introduce a multicore response time analysis (MRTA) framework, which decouples response time analysis from a reliance on context-independent WCET values. Instead, the analysis formulates response times directly from the demands placed on different hardware resources. The MRTA framework is extensible to different multicore architectures, with a variety of arbitration policies for the common interconnects, and different types and arrangements of local memory. We instantiate the framework for single level local data and instruction memories (cache or scratchpads), for a variety of memory bus arbitration policies, including: Round-Robin, FIFO, Fixed-Priority, Processor-Priority, and TDMA, and account for DRAM refreshes. The MRTA framework provides a general approach to timing verification for multicore systems that is parametric in the hardware configuration and so can be used at the architectural design stage to compare the guaranteed levels of real-time performance that can be obtained with different hardware configurations. We use the framework in this way to evaluate the performance of multicore systems with a variety of different architectural components and policies. These results are then used to compose a predictable architecture, which is compared against a reference architecture designed for good average-case behaviour. This comparison shows that the predictable architecture has substantially better guaranteed real-time performance, with the precision of the analysis verified using cycle-accurate simulation.",
   	issn="1573-1383",
   	doi="10.1007/s11241-017-9285-4",
   	url="https://doi.org/10.1007/s11241-017-9285-4"
   }

6. Response-time analysis for fixed-priority systems with a write-back cache
   R. I. Davis, S. Altmeyer, and J. Reineke
   Real-Time Systems, 2018. [doi]  [bib]
   

   @Article{Davis2018,
   author="Davis, Robert I.
   and Altmeyer, Sebastian
   and Reineke, Jan",
   title="Response-time analysis for fixed-priority systems with a write-back cache",
   journal="Real-Time Systems",
   year="2018",
   month="Apr",
   day="11",
   abstract="This paper introduces analyses of write-back caches integrated into response-time analysis for fixed-priority preemptive and non-preemptive scheduling. For each scheduling paradigm, we derive four different approaches to computing the additional costs incurred due to write backs. We show the dominance relationships between these different approaches and note how they can be combined to form a single state-of-the-art approach in each case. The evaluation explores the relative performance of the different methods using a set of benchmarks, as well as making comparisons with no cache and a write-through cache. We also explore the effect of write buffers used to hide the latency of write-through caches. We show that depending upon the depth of the buffer used and the policies employed, such buffers can result in domino effects. Our evaluation shows that even ignoring domino effects, a substantial write buffer is needed to match the guaranteed performance of write-back caches.",
   issn="1573-1383",
   doi="10.1007/s11241-018-9305-z",
   url="https://doi.org/10.1007/s11241-018-9305-z"
   }

7. On the Smoothness of Paging Algorithms
   J. Reineke and A. Salinger
   Theory of Computing Systems, 2018. [doi]  [bib]
   

   @Article{Reineke18,
   author="Reineke, Jan
   and Salinger, Alejandro",
   title="On the Smoothness of Paging Algorithms",
   journal="Theory of Computing Systems",
   year="2018",
   month="Feb",
   day="01",
   volume="62",
   number="2",
   pages="366--418",
   abstract="We study the smoothness of paging algorithms. How much can the number of page faults increase due to a perturbation of the request sequence? We call a paging algorithm smooth if the maximal increase in page faults is proportional to the number of changes in the request sequence. We also introduce quantitative smoothness notions that measure the smoothness of an algorithm. We derive lower and upper bounds on the smoothness of deterministic and randomized demand-paging and competitive algorithms. Among strongly-competitive deterministic algorithms, LRU matches the lower bound, while FIFO matches the upper bound. Well-known randomized algorithms such as Partition, Equitable, or Mark are shown not to be smooth. We introduce two new randomized algorithms, called Smoothed-LRU and LRU-Random. Smoothed-LRU allows sacrificing competitiveness for smoothness, where the trade-off is controlled by a parameter. LRU-Random is at least as competitive as any deterministic algorithm but smoother.",
   issn="1433-0490",
   doi="10.1007/s00224-017-9813-6",
   url="https://doi.org/10.1007/s00224-017-9813-6"
   }

8. A Survey on Static Cache Analysis for Real-Time Systems
   M. Lv, N. Guan, J. Reineke, R. Wilhelm, W. Yi
   Leibniz Transactions on Embedded Systems, 3(1), June 2016. [doi]  [pdf]  [bib]
   

   @article{Lv16,
   	author = {Mingsong Lv and Nan Guan and Jan Reineke and Reinhard Wilhelm and Wang Yi},
   	title = {A Survey on Static Cache Analysis for Real-Time Systems},
   	journal = {Leibniz Transactions on Embedded Systems},
   	volume = {3},
   	number = {1},
   	year = {2016},
   	keywords = {Hard real-time; Cache analysis; Worst-case execution time},
   	abstract = {Real-time systems are reactive computer systems that must produce their reaction to a stimulus within given time bounds. A vital verification requirement is to estimate the Worst-Case Execution Time (WCET) of programs. These estimates are then used to predict the timing behavior of the overall system. The execution time of a program heavily depends on the underlying hardware, among which cache has the biggest influence. Analyzing cache behavior is very challenging due to the versatile cache features and complex execution environment. This article provides a survey on static cache analysis for real-time systems. We first present the challenges and static analysis techniques for independent programs with respect to different cache features. Then, the discussion is extended to cache analysis in complex execution environment, followed by a survey of existing tools based on static techniques for cache analysis. An outlook for future research is provided at last.},
   	issn = {2199-2002},	
   	pages = {05--1-05:48},
   	doi = {10.4230/LITES-v003-i001-a005},
   	url = {http://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v003-i001-a005}
   }

9. CacheAudit: A Tool for the Static Analysis of Cache Side Channels
   G. Doychev, B. Köpf, L. Mauborgne, and J. Reineke
   ACM Transactions on Information and System Security, 18(1), June 2015. [doi]  [pdf]  [bib]
   

   @article{Doychev15,
    author = {Doychev, Goran and K\"{o}pf, Boris and Mauborgne, Laurent and Reineke, Jan},
    title = {{CacheAudit}: A Tool for the Static Analysis of Cache Side Channels},
    journal = {ACM Trans. Inf. Syst. Secur.},
    issue_date = {June 2015},
    volume = {18},
    number = {1},
    month = jun,
    year = {2015},
    issn = {1094-9224},
    pages = {4:1--4:32},
    articleno = {4},
    numpages = {32},
    url = {http://doi.acm.org/10.1145/2756550},
    doi = {10.1145/2756550},
    acmid = {2756550},
    publisher = {ACM},
    address = {New York, NY, USA},
    keywords = {Side-channel attacks, caches},
   }

10. Towards Compositionality in Execution Time Analysis - Definition and Challenges
    S. Hahn, J. Reineke, and R. Wilhelm
    SIGBED Review, 12 (1), 2015. [doi]  [bib]
    

    @article{Hahn15,
      author    = {Sebastian Hahn and
                   Jan Reineke and
                   Reinhard Wilhelm},
      title     = {Towards compositionality in execution time analysis: definition and
                   challenges},
      journal   = {{SIGBED} Review},
      volume    = {12},
      number    = {1},
      pages     = {28--36},
      year      = {2015},
      url       = {http://doi.acm.org/10.1145/2752801.2752805},
      doi       = {10.1145/2752801.2752805},
      timestamp = {Sat, 25 Apr 2015 19:50:05 +0200},
      biburl    = {http://dblp.uni-trier.de/rec/bib/journals/sigbed/0001RW15},
      bibsource = {dblp computer science bibliography, http://dblp.org}
    }

11. Randomized Caches Considered Harmful in Hard Real-Time Systems
    J. Reineke
    Leibniz Transactions on Embedded Systems, 1 (1), June 2014. [doi]  [pdf]  [bib]
    

    @article{Reineke14e,
    	author = {Jan Reineke},
    	title = {Randomized Caches Considered Harmful in Hard Real-Time Systems},
    	journal = {Leibniz Transactions on Embedded Systems},
    	volume = {1},
    	number = {1},
    	year = {2014},
    	keywords = {real-time systems, caches, randomization, WCET analysis},
    	abstract = {We investigate the suitability of caches with randomized placement and replacement in the context of hard real-time systems. Such caches have been claimed to drastically reduce the amount of information required by static worst-case execution time (WCET) analysis, and to be an enabler for measurement-based probabilistic timing analysis. We refute these claims and conclude that with prevailing static and measurement-based analysis techniques caches with deterministic placement and least-recently-used replacement are preferable over randomized ones.},
    	issn = {2199-2002},	
    	url = {http://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v001-i001-a003}, 
    	pdf = {http://ojs.dagstuhl.de/index.php/lites/article/view/LITES-v001-i001-a003/lites-v001-i001-a003-pdf},
    	pages = {03:1-03:13},
    	doi = {10.4230/LITES-v001-i001-a003}
    }

12. Building Timing Predictable Embedded Systems
    P. Axer, R. Ernst, H. Falk, A. Girault, D. Grund, N. Guan, B. Jonsson, P. Marwedel, J. Reineke, C. Rochange, M. Sebastian, R. von Hanxleden, R. Wilhelm, W. Yi
    ACM Transactions on Embedded Computing Systems, 13 (4), February 2014. [doi] [pdf]  [bib]
    

    @article{Axer14,
     author = {Axer, Philip and Ernst, Rolf and Falk, Heiko and Girault, Alain and Grund, Daniel and Guan, Nan and Jonsson, Bengt and Marwedel, Peter and Reineke, Jan and Rochange, Christine and Sebastian, Maurice and Hanxleden, Reinhard Von and Wilhelm, Reinhard and Yi, Wang},
     title = {Building Timing Predictable Embedded Systems},
     journal = {ACM Trans. Embed. Comput. Syst.},
     issue_date = {February 2014},
     volume = {13},
     number = {4},
     month = mar,
     year = {2014},
     issn = {1539-9087},
     pages = {82:1--82:37},
     articleno = {82},
     numpages = {37},
     url = {http://doi.acm.org/10.1145/2560033},
     doi = {10.1145/2560033},
     acmid = {2560033},
     publisher = {ACM},
     address = {New York, NY, USA},
     keywords = {Embedded systems, predictability, resource sharing, safety-critical systems, timing analysis},
    } 
    

13. Sensitivity of Cache Replacement Policies
    J. Reineke and D. Grund
    ACM Transactions on Embedded Computing Systems, 12 (1), March 2013. [pdf]  [bib]
    

    @article{Reineke13,
     author = {Reineke, Jan and Grund, Daniel},
     title = {Sensitivity of cache replacement policies},
     journal = {ACM Trans. Embed. Comput. Syst.},
     issue_date = {March 2013},
     volume = {12},
     number = {1s},
     month = mar,
     year = {2013},
     issn = {1539-9087},
     pages = {42:1--42:18},
     articleno = {42},
     numpages = {18},
     url = {http://doi.acm.org/10.1145/2435227.2435238},
     doi = {10.1145/2435227.2435238},
     acmid = {2435238},
     publisher = {ACM},
     address = {New York, NY, USA},
     keywords = {Measurement-based timing analysis, WCET analysis, cache performance, predictability, replacement policy, worst-case execution time},
    }

14. Branch Target Buffers: WCET Analysis Framework and Timing Predictability
    D. Grund, J. Reineke, and G. Gebhard
    Journal of Systems Architecture, 57 (6), 2011. [doi]  [pdf]  [bib]
    

    @ARTICLE{Grund11b,
       author = {Daniel Grund and Jan Reineke and Gernot Gebhard},
       title = {Branch Target Buffers: {WCET} Analysis Framework and Timing Predictability},
       journal = {Journal of Systems Architecture},
       year = {2011},
       volume = {57},
       pages = {625--637},
       number = {6},
       doi = {10.1016/j.sysarc.2010.05.013},
       issn = {1383-7621},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/jsa10-BTBs.pdf}
     }

15. Predictability Considerations in the Design of Multi-Core Embedded Systems
    C. Cullmann, C. Ferdinand, G. Gebhard, D. Grund, C. Maiza, J. Reineke, B. Triquet, S. Wegener, and R. Wilhelm
    Ingénieurs de l'Automobile, 807, 2010. [bib]
    

    @ARTICLE{Cullmann10a,
       author = {Christoph Cullmann and Christian Ferdinand and Gernot Gebhard and Daniel Grund and Claire Maiza and Jan Reineke and Beno\^it Triquet and Simon Wegener and Reinhard Wilhelm},
       title = {Predictability Considerations in the Design of Multi-Core Embedded Systems},
       journal = {Ing\'enieurs de l'Automobile},
       year = {2010},
       volume = {807},
       pages = {36--42},
       month = {September},
       issn = {0020-1200}
     }

16. Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-critical Embedded Systems
    R. Wilhelm, D. Grund, J. Reineke, M. Schlickling, M. Pister, and C. Ferdinand
    IEEE Transactions on CAD of Integrated Circuits and Systems, 28 (7), 2009. [doi]  [bib]
    

    @ARTICLE{Wilhelm09,
       author = {Reinhard Wilhelm and Daniel Grund and Jan Reineke and Marc Schlickling and Markus Pister and Christian Ferdinand},
       title = {Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-critical Embedded Systems},
       journal = {IEEE Transactions on {CAD} of Integrated Circuits and Systems},
       year = {2009},
       volume = {28},
       pages = {966--978},
       number = {7},
       month = {July},
       doi = {10.1109/TCAD.2009.2013287}
     }

17. Timing Predictability of Cache Replacement Policies
    J. Reineke, D. Grund, C. Berg, and R. Wilhelm
    Real-Time Systems, 37 (2), 2007. [doi]  [pdf]  [slides]  [bib]
    

    @ARTICLE{Reineke07,
       author = {Jan Reineke and Daniel Grund and Christoph Berg and Reinhard Wilhelm},
       title = {Timing Predictability of Cache Replacement Policies},
       journal = {Real-Time Systems},
       year = {2007},
       volume = {37},
       pages = {99--122},
       number = {2},
       month = {November},
       doi = {10.1007/s11241-007-9032-3},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/predictabilityCacheReplacement.ppt},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/rts07-predictability.pdf}
     }

1. Spectector: Principled Detection of Speculative Information Flows
   M. Guarnieri, B. Köpf, J. Morales, J. Reineke, and A. Sanchez
   IEEE Symposium on Security & Privacy, 2020. [pdf] [web] [bib]
   

   @INPROCEEDINGS{Guarnieri20,
     author    = {Marco Guarnieri and
                  Boris K{\"{o}}pf and
                  Jos{\'{e}} F. Morales and
                  Jan Reineke and
                  Andr{\'{e}}s S{\'{a}}nchez},
     title     = {{SPECTECTOR:} Principled Detection of Speculative Information Flows},
     booktitle = {2020 {IEEE} Symposium on Security and Privacy, {SP} 2020, Proceedings, San Francisco, California, {USA}},  
     year      = {2020},
     month	    = {May},
     url       = {https://spectector.github.io/papers/spectector.pdf},
   }

2. uops.info: Characterizing Latency, Throughput, and Port Usage of Instructions on Intel Microarchitectures
   A. Abel and J. Reineke
   ASPLOS, 2019. [pdf] [bib]
   

   @INPROCEEDINGS{Abel19,
       author = {Andreas Abel and Jan Reineke},
       title = {uops.info: Characterizing Latency, Throughput, and Port Usage of Instructions on Intel Microarchitectures},
       booktitle = {ASPLOS},
       year = {2019},
       month = {April},
       url = {https://arxiv.org/pdf/1810.04610.pdf},
   }

3. Fast and Exact Analysis for LRU Caches
   V. Touzeau, C. Maiza, D. Monniaux, and J. Reineke
   POPL, 2019. [url]  [doi]  [bib]
   

   @article{Touzeau19,
    author = {Touzeau, Valentin and Ma\"{\i}za, Claire and Monniaux, David and Reineke, Jan},
    title = {Fast and Exact Analysis for LRU Caches},
    journal = {Proc. ACM Program. Lang.},
    issue_date = {January 2019},
    volume = {3},
    number = {POPL},
    month = jan,
    year = {2019},
    issn = {2475-1421},
    pages = {54:1--54:29},
    articleno = {54},
    numpages = {29},
    url = {http://doi.acm.org/10.1145/3290367},
    doi = {10.1145/3290367},
    acmid = {3290367},
    publisher = {ACM},
    address = {New York, NY, USA},
    keywords = {Abstract Interpretation, Cache Analysis, LRU},
   }

4. Design and Analysis of SIC: A Provably Timing-Predictable Pipelined Processor Core (Best Student Paper Award )
   S. Hahn and J. Reineke
   RTSS, 2018. [pdf] [pdf slides] [bib]
   

   @INPROCEEDINGS{Hahn18,
       author = {Sebastian Hahn and Jan Reineke},
       title = {Design and Analysis of SIC: A Provably Timing-Predictable Pipelined Processor Core},
       booktitle = {RTSS},
       year = {2018},
       month = {December},
   }

5. Experimental Evaluation of Cache-Related Preemption Delay Aware Timing Analysis
   D. Shah, S. Hahn, and J. Reineke
   WCET, 2018. [bib]
   

   @INPROCEEDINGS{Shah18,
       author = {Darshit Shah and Sebastian Hahn and Jan Reineke},
       title = {Experimental Evaluation of Cache-Related Preemption Delay Aware Timing Analysis},
       booktitle = {15th International Workshop on Worst-Case Execution Time Analysis,
                  {WCET} 2018, July 3, 2018, Barcelona, Spain},
       year = {2018},
       month = {July},
   }

6. Abstract PRET Machines
   E. A. Lee, J. Reineke, and M. Zimmer
   RTSS, 2017. [doi]  [bib]
   

   @inproceedings{Lee17,
     author    = {Edward A. Lee and
                  Jan Reineke and
                  Michael Zimmer},
     title     = {Abstract {PRET} Machines},
     booktitle = {2017 {IEEE} Real-Time Systems Symposium, {RTSS} 2017, Paris, France,
                  December 5-8, 2017},
     pages     = {1--11},
     year      = {2017},
     url       = {http://doi.ieeecomputersociety.org/10.1109/RTSS.2017.00041},
     doi       = {10.1109/RTSS.2017.00041},
   }

7. Memory Bank Partitioning for Fixed-Priority Tasks in a Multi-Core System
   S.-W. Cheng, J.-J. Chen, J. Reineke, and T.-W. Kuo
   RTSS, 2017. [doi]  [bib]
   

   @inproceedings{Cheng17,
     author    = {Sheng{-}Wei Cheng and
                  Jian{-}Jia Chen and
                  Jan Reineke and
                  Tei{-}Wei Kuo},
     title     = {Memory Bank Partitioning for Fixed-Priority Tasks in a Multi-core
                  System},
     booktitle = {2017 {IEEE} Real-Time Systems Symposium, {RTSS} 2017, Paris, France,
                  December 5-8, 2017},
     pages     = {209--219},
     year      = {2017},
     url       = {http://doi.ieeecomputersociety.org/10.1109/RTSS.2017.00027},
     doi       = {10.1109/RTSS.2017.00027},
   }

8. Ascertaining Uncertainty for Efficient Exact Cache Analysis
   V. Touzeau, C. Maiza, D. Monniaux, and J. Reineke
   CAV, 2017. [pdf]  [bib]
   

   @INPROCEEDINGS{Touzeau17,
       author = {Valentin Touzeau and Claire Maiza and David Monniaux and Jan Reineke},
       title = {Ascertaining Uncertainty for Efficient Exact Cache Analysis},
       booktitle = {CAV},
       year = {2017},
       month = {July},
       url = {http://embedded.cs.uni-saarland.de/publications/AscertainingUncertaintyForEfficientExactCacheAnalysisCAV2017.pdf},
   }

9. Write-back Caches in WCET Analysis (Outstanding Paper Award )
   T. Blaß, S. Hahn, and J. Reineke
   ECRTS, 2017. [doi]  [pdf]  [pdf slides]  [bib]
   

   @inproceedings{Blass17,
     author    = {Tobias Bla{\ss} and
                  Sebastian Hahn and
                  Jan Reineke},
     title     = {Write-Back Caches in {WCET} Analysis},
     booktitle = {29th Euromicro Conference on Real-Time Systems, {ECRTS} 2017, June
                  27-30, 2017, Dubrovnik, Croatia},
     pages     = {26:1--26:22},
     year      = {2017},
     url       = {https://doi.org/10.4230/LIPIcs.ECRTS.2017.26},
     doi       = {10.4230/LIPIcs.ECRTS.2017.26},
   }

10. Security Analysis of Cache Replacement Policies (Nominated for "Best ETAPS Paper")
    P. Canones, B. Köpf, and J. Reineke
    POST, 2017. [doi]  [pdf]  [bib]
    

    @inproceedings{Canones17,
      author    = {Pablo Ca{\~{n}}ones and
                   Boris K{\"{o}}pf and
                   Jan Reineke},
      title     = {Security Analysis of Cache Replacement Policies},
      booktitle = {Principles of Security and Trust - 6th International Conference, {POST}
                   2017, Held as Part of the European Joint Conferences on Theory and
                   Practice of Software, {ETAPS} 2017, Uppsala, Sweden, April 22-29,
                   2017, Proceedings},
      pages     = {189--209},
      year      = {2017},
      url       = {http://dx.doi.org/10.1007/978-3-662-54455-6_9},
      doi       = {10.1007/978-3-662-54455-6_9},
    }

11. Enabling Compositionality for Multicore Timing Analysis
    S. Hahn, M. Jacobs, and J. Reineke
    RTNS, 2016. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Hahn16,
        author = {Sebastian Hahn and Michael Jacobs and Jan Reineke},
        title = {Enabling Compositionality for Multicore Timing Analysis},
        booktitle = {Proceedings of the 24th International Conference on Real Time and Networks Systems},
        year = {2016},
        month = {October},
        url = {http://embedded.cs.uni-saarland.de/publications/EnablingCompositionalityRTNS2016.pdf},
        doi = {10.1145/2997465.2997471},
    }

12. Analysis of Write-back Caches under Fixed-priority Preemptive and Non-preemptive Scheduling (Outstanding Paper Award )
    R. Davis, S. Altmeyer, and J. Reineke
    RTNS, 2016. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Davis16,
        author = {Rob Davis and Sebastian Altmeyer and Jan Reineke},
        title = {Analysis of Write-back Caches under Fixed-priority Preemptive and Non-preemptive Scheduling},
        booktitle = {Proceedings of the 24th International Conference on Real Time and Networks Systems},
        year = {2016},
        month = {October},
        doi = {10.1145/2997465.2997476},
    }

13. Gray-box Learning of Serial Compositions of Mealy Machines
    A. Abel and J. Reineke
    NFM, 2016. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Abel16,
        author = {Andreas Abel and Jan Reineke},
        title = {Gray-box Learning of Serial Compositions of Mealy Machines},
        booktitle = {Nasa Formal Methods Symposium},
        year = {2016},
        month = {June},
        doi = {10.1007/978-3-319-40648-0_21},
    }

14. MIRROR: Symmetric Timing Analysis for Real-Time Tasks on Multicore Platforms with Shared Resources
    W.-H. Huang and J.-J. Chen and Jan Reineke
    DAC, 2016. [pdf]  [bib]
    

    @INPROCEEDINGS{Huang16,
        author = {Wen-Hung Huang and Jian-Jia Chen and Jan Reineke},
        title = {{MIRROR}: Symmetric Timing Analysis for Real-Time Tasks on Multicore Platforms with Shared Resources},
        booktitle = {DAC},
        year = {2016},
        month = {June},
        url = {http://embedded.cs.uni-saarland.de/publications/MIRRORSymmetricTimingAnalysisDAC2016.pdf}
    }

15. A Generic and Compositional Framework for Multicore Response Time Analysis (Outstanding Paper Award )
    S. Altmeyer, R. I. Davis, L. S. Indrusiak, C. Maiza, V. Nelis, and J. Reineke
    RTNS, 2015. [doi]  [pdf]  [bib]
    

    @inproceedings{Altmeyer15b,
      author    = {Sebastian Altmeyer and
                   Robert I. Davis and
                   Leandro Soares Indrusiak and
                   Claire Maiza and
                   Vincent N{\'{e}}lis and
                   Jan Reineke},
      title     = {A generic and compositional framework for multicore response time
                   analysis},
      booktitle = {Proceedings of the 23rd International Conference on Real Time and
                   Networks Systems, {RTNS} 2015, Lille, France, November 4-6, 2015},
      pages     = {129--138},
      year      = {2015},
      url       = {http://doi.acm.org/10.1145/2834848.2834862},
      doi       = {10.1145/2834848.2834862},
    }

16. MeMin: SAT-based Exact Minimization of Incompletely Specified Mealy Machines
    A. Abel and J. Reineke
    ICCAD, 2015. [doi]  [pdf]  [bib]
    

    @inproceedings{Abel15,
      author    = {Andreas Abel and
                   Jan Reineke},
      title     = {MeMin: SAT-based Exact Minimization of Incompletely Specified Mealy
                   Machines},
      booktitle = {Proceedings of the {IEEE/ACM} International Conference on Computer-Aided
                   Design, {ICCAD} 2015, Austin, TX, USA, November 2-6, 2015},
      pages     = {94--101},
      year      = {2015},
      url       = {http://dx.doi.org/10.1109/ICCAD.2015.7372555},
      doi       = {10.1109/ICCAD.2015.7372555},
    }

17. On the Smoothness of Paging Algorithms
    J. Reineke and A. Salinger
    WAOA, 2015. [doi]  [pdf]  [bib]
    

    @inproceedings{Reineke15,
      author    = {Jan Reineke and
                   Alejandro Salinger},
      title     = {On the Smoothness of Paging Algorithms},
      booktitle = {Approximation and Online Algorithms - 13th International Workshop,
                   {WAOA} 2015, Patras, Greece, September 17-18, 2015. Revised Selected
                   Papers},
      pages     = {170--182},
      year      = {2015},
      url       = {http://dx.doi.org/10.1007/978-3-319-28684-6_15},
      doi       = {10.1007/978-3-319-28684-6_15},
    }

18. ASTRA: A tool for abstract interpretation of graph transformation systems
    P. Backes and J. Reineke
    SPIN, 2015. [doi]  [bib]
    

    @inproceedings{Backes15b,
      author    = {Peter Backes and
                   Jan Reineke},
      title     = {{ASTRA:} {A} Tool for Abstract Interpretation of Graph Transformation
                   Systems},
      booktitle = {Model Checking Software - 22nd International Symposium, {SPIN} 2015,
                   Stellenbosch, South Africa, August 24-26, 2015, Proceedings},
      pages     = {13--19},
      year      = {2015},
      url       = {http://dx.doi.org/10.1007/978-3-319-23404-5_2},
      doi       = {10.1007/978-3-319-23404-5_2},
    }

19. WCET and Mixed-Criticality: What does Confidence in WCET Estimations Depend Upon?
    S. Altmeyer, B. Lisper, C. Maiza, J. Reineke and C. Rochange
    WCET, 2015. [doi]  [bib]
    

    @inproceedings{Altmeyer15,
      author    = {Sebastian Altmeyer and
                   Bj{\"{o}}rn Lisper and
                   Claire Maiza and
                   Jan Reineke and
                   Christine Rochange},
      title     = {{WCET} and Mixed-Criticality: What does Confidence in {WCET} Estimations
                   Depend Upon?},
      booktitle = {15th International Workshop on Worst-Case Execution Time Analysis,
                   {WCET} 2015, July 7, 2015, Lund, Sweden},
      pages     = {65--74},
      year      = {2015},
      url       = {http://dx.doi.org/10.4230/OASIcs.WCET.2015.65},
      doi       = {10.4230/OASIcs.WCET.2015.65},
    }
    

20. Analysis of Infinite-State Graph Transformation Systems by Cluster Abstraction
    P. Backes and J. Reineke
    VMCAI, 2015. [pdf]  [doi]  [bib]
    

    @inproceedings{Backes15,
      author    = {Peter Backes and
                   Jan Reineke},
      title     = {Analysis of Infinite-State Graph Transformation Systems by Cluster
                   Abstraction},
      booktitle = {Verification, Model Checking, and Abstract Interpretation - 16th International
                   Conference, {VMCAI} 2015, Mumbai, India, January 12-14, 2015. Proceedings},
      pages     = {135--152},
      year      = {2015},
      url       = {http://dx.doi.org/10.1007/978-3-662-46081-8_8},
      doi       = {10.1007/978-3-662-46081-8_8},
      url = {http://embedded.cs.uni-saarland.de/publications/AnalysisOfInfiniteStateGraphTransformationSystemsByClusterAbstractionVMCAI2015.pdf}
    }

21. A Compiler Optimization to Increase the Efficiency of WCET Analysis (Outstanding Paper Award )
    M. A. Maksoud and J. Reineke
    RTNS, 2014. [pdf]  [doi]  [bib]
    

    @inproceedings{Maksoud14,
     author = {Maksoud, Mohamed Abdel and Reineke, Jan},
     title = {A Compiler Optimization to Increase the Efficiency of {WCET} Analysis},
     booktitle = {Proceedings of the 22Nd International Conference on Real-Time Networks and Systems},
     series = {RTNS '14},
     year = {2014},
     isbn = {978-1-4503-2727-5},
     location = {Versailles, France},
     pages = {87:87--87:96},
     articleno = {87},
     numpages = {10},
     url = {http://embedded.cs.uni-saarland.de/publications/ACompilerOptimizationToIncreaseWCETAnalysisEfficiencyRTNS2014.pdf},
     doi = {10.1145/2659787.2659825},
     acmid = {2659825},
     publisher = {ACM},
     address = {New York, NY, USA},
     keywords = {WCET analysis efficiency, analyzability, predictability},
    } 

22. Basic Problems in Multi-View Modeling
    J. Reineke and S. Tripakis
    TACAS, 2014. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Reineke14a,
        author = {Jan Reineke and Stavros Tripakis},
        title = {Basic Problems in Multi-View Modeling},
        booktitle = {TACAS},
        year = {2014},
        month = {April},
        pages = {217-232},
        ee = {http://dx.doi.org/10.1007/978-3-642-54862-8_15},
        pdf = {http://embedded.cs.uni-saarland.de/publications/BasicProblemsInMultiViewModeling-TACAS2014.pdf},
    }

23. Architecture-Parametric Timing Analysis
    J. Reineke and J. Doerfert
    RTAS, 2014. [doi]  [pdf]  [pdf slides]  [bib]
    

    @INPROCEEDINGS{Reineke14,
        author = {Jan Reineke and Johannes Doerfert},
        title = {Architecture-Parametric Timing Analysis},
        booktitle = {20th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
                   {RTAS} 2014, Berlin, Germany, April 15-17, 2014},
        pages     = {189--200},
        year = {2014},
        doi       = {10.1109/RTAS.2014.6926002},
        month = {April},
        url = {http://embedded.cs.uni-saarland.de/publications/ArchitectureParametricTimingAnalysis-RTAS2014.pdf}
    }

24. Selfish-LRU: Preemption-Aware Caching for Predictability and Performance
    J. Reineke, S. Altmeyer, D. Grund, S. Hahn, C. Maiza
    RTAS, 2014. [doi]  [pdf]  [pdf slides]  [bib]
    

    @INPROCEEDINGS{Reineke14b,
        author = {Jan Reineke and Sebastian Altmeyer and Daniel Grund and Sebastian Hahn and Claire Maiza},
        title     = {Selfish-LRU: Preemption-aware caching for predictability and performance},
        booktitle = {20th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
                   {RTAS} 2014, Berlin, Germany, April 15-17, 2014},
        pages     = {135--144},
        year = {2014},
        month = {April},
        doi       = {10.1109/RTAS.2014.6925997},
        url = {http://embedded.cs.uni-saarland.de/publications/SelfishLRU-RTAS-2014.pdf},
    }

25. Towards Compositionality in Execution Time Analysis - Definition and Challenges
    S. Hahn, J. Reineke, and R. Wilhelm
    CRTS, 2013. [pdf]  [bib]
    

    @INPROCEEDINGS{Hahn13,
        author = {Sebastian Hahn and Jan Reineke and Reinhard Wilhelm},
        title = {Towards Compositionality in Execution Time Analysis -- Definition and Challenges},
        booktitle = {6th International Workshop 
    on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS)},
        year = {2013},
        month = {December},
        url = "http://embedded.cs.uni-saarland.de/publications/TowardsCompositionality.pdf",
        
    }

26. CacheAudit: A Tool for the Static Analysis of Cache Side Channels
    G. Doychev, D. Feld, B. Köpf, L. Mauborgne, and J. Reineke
    USENIX Security, 2013. [pdf]  [bib]
    

    @INPROCEEDINGS{Doychev13,
        author = {Goran Doychev and Dominik Feld and Boris Köpf and Laurent Mauborgne and Jan Reineke},
        title = {{CacheAudit}: {A} Tool for the Static Analysis of Cache Side Channels},
      booktitle = {Proceedings of the 22th {USENIX} Security Symposium, Washington, DC,
                   USA, August 14-16, 2013},
      pages     = {431--446},
        year = {2013},
        month = {August},
       url = {http://embedded.cs.uni-saarland.de/publications/CacheAuditUSENIXSecurity13.pdf}
    }
    

27. Impact of Resource Sharing on Performance and Performance Prediction: A Survey
    A. Abel, F. Benz, J. Doerfert, B. Dörr, S. Hahn, F. Haupenthal, M. Jacobs, A. H. Moin, J. Reineke, B. Schommer, and R. Wilhelm
    CONCUR, 2013. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Abel13b,
        author = {Andreas Abel and Florian Benz and Johannes Doerfert and Barbara D\"orr and Sebastian Hahn and Florian Haupenthal and Michael Jacobs and Amir H. Moin and Jan Reineke and Bernhard Schommer and Reinhard Wilhelm},
        title = {Impact of Resource Sharing on Performance and Performance Prediciton: {A} Survey},
        booktitle = {{CONCUR} 2013 - Concurrency Theory - 24th International Conference,
                   {CONCUR} 2013, Buenos Aires, Argentina, August 27-30, 2013. Proceedings},
        pages     = {25--43},
        year = {2013},
        month = {August},
        doi       = {10.1007/978-3-642-40184-8_3},
        url = "http://embedded.cs.uni-saarland.de/publications/ResourceSharingSurvey.pdf",
    }
    

28. Precise Timing Analysis for Direct-Mapped Caches
    S. Andalam, R. Sinha, P. Roop, A. Girault, and J. Reineke
    DAC, 2013. [doi]  [bib]
    

    @inproceedings{Andalam13,
      author    = {Sidharta Andalam and
                   Alain Girault and
                   Roopak Sinha and
                   Partha S. Roop and
                   Jan Reineke},
      title     = {Precise timing analysis for direct-mapped caches},
      booktitle = {DAC},
      year      = {2013},
      pages     = {148},
      ee        = {http://doi.acm.org/10.1145/2463209.2488917},
      bibsource = {DBLP, http://dblp.uni-trier.de},
    }

29. Measurement-based Modeling of the Cache Replacement Policy
    A. Abel and J. Reineke
    RTAS (as part of CPS Week), 2013. [pdf]  [slides]  [pdf slides]  [bib]
    

    @INPROCEEDINGS{Abel13,
       author = {Andreas Abel and Jan Reineke},
       title = {Measurement-based Modeling of the Cache Replacement Policy},
       booktitle = {19th {IEEE} Real-Time and Embedded Technology and Applications Symposium,
                   {RTAS} 2013, Philadelphia, PA, USA, April 9-11, 2013},
       pages     = {65--74},
       year      = {2013},
       month = {April},
       url = {http://embedded.cs.uni-saarland.de/publications/CacheModelingRTAS2013.pdf},
       slides = {http://embedded.cs.uni-saarland.de/presentations/LearningCacheModels.pptx},
       slidespdf = {http://embedded.cs.uni-saarland.de/presentations/LearningCacheModels.pdf},
    }

30. Automatic Cache Modeling by Measurements
    A. Abel and J. Reineke
    JRWRTC, 2012. [pdf] [bib]
    

    @INPROCEEDINGS{Abel12,
       author = {Andreas Abel and Jan Reineke},
       title = {Automatic Cache Modeling by Measurements},
       booktitle = {6th Junior Researcher Workshop on Real-Time Computing (in conjunction with RTNS)},
       month = {November},
       year = {2012},
       url = {http://embedded.cs.uni-saarland.de/publications/CacheModelingJRWRTC.pdf},
    }

31. A PRET Microarchitecture Implementation with Repeatable Timing and Competitive Performance
    I. Liu, J. Reineke, D. Broman, M. Zimmer, and E.A. Lee
    ICCD, 2012. [pdf]  [bib]
    

    @INPROCEEDINGS{Liu12,
       author = {Isaac Liu and Jan Reineke and David Broman and Michael Zimmer and Edward A. Lee},
       title = {A PRET Microarchitecture Implementation with Repeatable Timing and Competitive Performance},
       booktitle = {ICCD},
       month = {September},
       year = {2012},
    }

32. An Empirical Evaluation of the Influence of the Load-Store Unit on WCET Analysis
    M. Abdel Maksoud and J. Reineke
    WCET, 2012. [pdf]  [doi]  [bib]
    

    @InProceedings{Maksoud12,
      author =	{Mohamed Abdel Maksoud and Jan Reineke},
      title =	{An Empirical Evaluation of the Influence of the Load-Store Unit on {WCET} Analysis},
      booktitle =	{12th International Workshop on Worst-Case Execution Time Analysis},
      pages =	{13--24},
      series =	{OpenAccess Series in Informatics (OASIcs)},
      ISBN =	{978-3-939897-41-5},
      ISSN =	{2190-6807},
      year =	{2012},
      volume =	{23},
      editor =	{Tullio Vardanega},
      publisher =	{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
      address =	{Dagstuhl, Germany},
      URL =		{http://drops.dagstuhl.de/opus/volltexte/2012/3553},
      URN =		{urn:nbn:de:0030-drops-35536},
      doi =		{http://dx.doi.org/10.4230/OASIcs.WCET.2012.13},
    }
    

33. Embedded Systems: Many Cores - Many Problems
    R. Wilhelm, and J. Reineke
    SIES, 2012. [pdf]  [doi]  [bib]
    

    @INPROCEEDINGS{Wilhelm12,
       author = {Reinhard Wilhelm and Jan Reineke},
       title = {Embedded Systems: Many Cores - Many Problems},
       booktitle = {SIES},
       year = {2012},
       month = {June},
       pages = {176--180},
       doi={10.1109/SIES.2012.6356583}, 
     }

34. PRET DRAM Controller: Bank Privatization for Predictability and Temporal Isolation
    J. Reineke, I. Liu, H.D. Patel, S. Kim, and E.A. Lee
    CODES+ISSS, 2011. [slides]  [pdf]  [doi]  [bib]
    

    @INPROCEEDINGS{Reineke11,
       author = {Jan Reineke and Isaac Liu and Hiren D. Patel and Sungjun Kim and Edward A. Lee},
       title = {PRET DRAM Controller: Bank Privatization for Predictability and Temporal Isolation},
       booktitle = {CODES+ISSS},
       year = {2011},
       URL = {http://chess.eecs.berkeley.edu/pubs/851.html}
     }

35. Temporal Isolation on Multiprocessing Architectures
    D.N. Bui, E.A. Lee, I. Liu, H.D. Patel, J. Reineke
    DAC, 2011. [pdf] [doi] [bib]
    

    @INPROCEEDINGS{Bui11,
       author = {Dai Nguyen Bui and Edward A. Lee and Isaac Liu and Hiren D. Patel and Jan Reineke},
       title = {Temporal Isolation on Multiprocessing Architectures},
       booktitle = {DAC '11: Design Automation Conference},
       year = {2011},
       URL = {http://chess.eecs.berkeley.edu/pubs/839.html}
     }

36. CAMA: A Predictable Cache-Aware Memory Allocator
    J. Herter, P. Backes, F. Haupenthal, J. Reineke
    ECRTS, 2011. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Herter11,
       author = {J{\"o}rg Herter, Peter Backes, Florian Haupenthal, Jan Reineke},
       title     = {{CAMA:} {A} Predictable Cache-Aware Memory Allocator},
       booktitle = {23rd Euromicro Conference on Real-Time Systems, {ECRTS} 2011, Porto,
                   Portugal, 5-8 July, 2011},
       pages     = {23--32},
       url       = {http://dx.doi.org/10.1109/ECRTS.2011.11},
       doi = {10.1109/ECRTS.2011.11},
       year = {2011},
       month = {July},
     }

37. A Template for Predictability Definitions with Supporting Evidence
    D. Grund, J. Reineke, and R. Wilhelm
    Bringing Theory to Practice: Predictability and Performance in Embedded Systems, 2011. [doi]  [url]  [slides]  [bib]
    

    @INPROCEEDINGS{Grund11,
       author = {Daniel Grund and Jan Reineke and Reinhard Wilhelm},
       title = {A Template for Predictability Definitions with Supporting Evidence},
       booktitle = {Bringing Theory to Practice: Predictability and Performance in Embedded Systems},
       year = {2011},
       editor = {Philipp Lucas and Lothar Thiele and Benoit Triquet and Theo Ungerer and Reinhard Wilhelm},
       volume = {18},
       series = {OpenAccess Series in Informatics (OASIcs)},
       pages = {22--31},
       address = {Dagstuhl, Germany},
       publisher = {Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik},
       doi = {http://dx.doi.org/10.4230/OASIcs.PPES.2011.22},
       isbn = {978-3-939897-28-6},
       issn = {2190-6807},
       slides = {http://rw4.cs.uni-saarland.de/~grund/talks/ppes11-predictability_template.pdf},
       url = {http://drops.dagstuhl.de/opus/volltexte/2011/3078},
       urn = {urn:nbn:de:0030-drops-30785}
     }

38. A PRET Architecture Supporting Concurrent Programs with Composable Timing Properties
    I. Liu, J. Reineke, E.A. Lee
    44th Asilomar Conference on Signals, Systems, and Computers, 2010. [pdf]  [bib]
    

    @inproceedings{Liu10,
        author = {Isaac Liu and Jan Reineke and Edward A. Lee},
        title = {A PRET Architecture Supporting Concurrent 
                  Programs with Composable Timing Properties},
        booktitle = {44th Asilomar Conference  on Signals, Systems, and
                  Computers},
        month = {November},
        year = {2010},
        URL = {http://chess.eecs.berkeley.edu/pubs/803.html}
    }

39. Static Timing Analysis for Hard Real-Time Systems
    R. Wilhelm, S. Altmeyer, C. Burguière, D. Grund, J. Herter, J. Reineke, B. Wachter, and S. Wilhelm
    VMCAI, 2010. [pdf]  [doi]  [bib]
    

    @INPROCEEDINGS{Wilhelm10,
       author = {Reinhard Wilhelm and Sebastian Altmeyer and Claire Burgui\`ere and Daniel Grund and J\"org Herter and Jan Reineke and Bj\"orn Wachter and Stephan Wilhelm},
       title = {Static Timing Analysis for Hard Real-Time Systems},
       booktitle = {VMCAI},
       year = {2010},
       pages = {3--22},
       publisher = {Springer Verlag},
       doi = {10.1007/978-3-642-11319-2_3}
     }

40. Resilience Analysis: Tightening the CRPD Bound for Set-Associative Caches
    S. Altmeyer, C. Maiza, and J. Reineke
    LCTES, 2010. [doi]  [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Altmeyer10,
       author = {Sebastian Altmeyer and Claire Maiza and Jan Reineke},
       title = {Resilience Analysis: Tightening the CRPD Bound for Set-Associative Caches},
       booktitle = {LCTES '10: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems},
       year = {2010},
       pages = {153--162},
       address = {New York, NY, USA},
       month = {April},
       publisher = {ACM},
       doi = {10.1145/1755888.1755911},
       isbn = {978-1-60558-953-4},
       location = {Stockholm, Sweden},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/resilienceAnalysisAVACS09.pdf},
       url = {http://embedded.cs.uni-saarland.de/publications/ResilienceLCTES10.pdf}
     }

41. Predictability Considerations in the Design of Multi-Core Embedded Systems
    C. Cullmann, C. Ferdinand, G. Gebhard, D. Grund, C. Maiza, J. Reineke, B. Triquet, and R. Wilhelm
    ERTSS, 2010. [pdf]  [bib]
    

    @INPROCEEDINGS{Cullmann10,
       author = {Christoph Cullmann and Christian Ferdinand and Gernot Gebhard and Daniel Grund and Claire Maiza and Jan Reineke and Beno\^it Triquet and Reinhard Wilhelm},
       title = {Predictability Considerations in the Design of Multi-Core Embedded Systems},
       booktitle = {Proceedings of Embedded Real Time Software and Systems},
       year = {2010},
       month = {May},
       url = {http://www.erts2010.org/Site/0ANDGY78/Fichier/PAPIERS%20ERTS%202010/ERTS2010_0049_final.pdf}
     }

42. Precise and Efficient FIFO-Replacement Analysis Based on Static Phase Detection
    D. Grund, and J. Reineke
    ECRTS, 2010. [doi]  [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Grund10,
       author = {Daniel Grund and Jan Reineke},
       title = {Precise and Efficient {FIFO}-Replacement Analysis Based on Static Phase Detection},
       booktitle = {Proceedings of the 22nd Euromicro Conference on Real-Time Systems (ECRTS '10)},
       year = {2010},
       pages = {155--164},
       month = {July},
       doi = {10.1109/ECRTS.2010.8},
       isbn = {978-1-4244-7546-9},
       issn = {1068-3070},
       location = {Brussels, Belgium},
       slides = {http://rw4.cs.uni-saarland.de/~grund/talks/ecrts10-fifo.pdf},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/ecrts10-fifo_phases.pdf}
     }

43. Toward Precise PLRU Cache Analyis
    D. Grund, and J. Reineke
    WCET, 2010. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Grund10a,
       author = {Daniel Grund and Jan Reineke},
       title = {Toward Precise {PLRU} Cache Analyis},
       booktitle = {Proceedings of 10th International Workshop on Worst-Case Execution Time ({WCET}) Analysis},
       year = {2010},
       editor = {Bj\"orn Lisper},
       pages = {28--39},
       month = {July},
       publisher = {Austrian Computer Society},
       slides = {http://rw4.cs.uni-saarland.de/~grund/talks/wcet10-plru.pdf},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/wcet10-plru.pdf}
     }

44. A Graph Transformation Case Study for the Topology Analysis of Dynamic Communication System
    P. Backes, and J. Reineke
    Transformation Tool Contest 2010, 2010. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Backes10a,
       author = {Peter Backes and Jan Reineke},
       title = {A Graph Transformation Case Study for the Topology Analysis of Dynamic Communication System},
       booktitle = {Transformation Tool Contest 2010},
       year = {2010},
       volume = {WP10-03},
       series = {{CTIT} Workshop Proceedings},
       pages = {107--118},
       address = {Enschede},
       publisher = {University of Twente},
       slides = {http://rw4.cs.uni-sb.de/~rtc/ttc10s.pdf},
       url = {http://rw4.cs.uni-sb.de/~rtc/ttc2010.pdf}
     }

45. Abstract Topology Analysis of the Join Phase of the Merge Protocol
    P. Backes, and J. Reineke
    Transformation Tool Contest 2010, 2010. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Backes10,
       author = {Peter Backes and Jan Reineke},
       title = {Abstract Topology Analysis of the Join Phase of the Merge Protocol},
       booktitle = {Transformation Tool Contest 2010},
       year = {2010},
       volume = {WP10-03},
       series = {{CTIT} Workshop Proceedings},
       pages = {127--133},
       address = {Enschede},
       publisher = {University of Twente},
       slides = {http://rw4.cs.uni-sb.de/~rtc/ttc10bs.pdf},
       url = {http://rw4.cs.uni-sb.de/~rtc/ttc2010b.pdf}
     }

46. Abstract Interpretation of FIFO Replacement
    D. Grund, and J. Reineke
    SAS, 2009. [doi]  [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Grund09,
       author = {Daniel Grund and Jan Reineke},
       title = {Abstract Interpretation of {FIFO} Replacement},
       booktitle = {Static Analysis, 16th International Symposium, SAS 2009},
       year = {2009},
       editor = {Jens Palsberg and Zhendong Su},
       volume = {5673},
       series = {LNCS},
       pages = {120--136},
       month = {August},
       publisher = {Springer-Verlag},
       doi = {10.1007/978-3-642-03237-0},
       slides = {http://rw4.cs.uni-saarland.de/~grund/talks/sas09-fifo.pdf},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/sas09-AI_FIFO.pdf}
     }

47. Branch Target Buffers: WCET Analysis and Timing Predictability
    D. Grund, J. Reineke, and G. Gebhard
    RTCSA, 2009. [doi]  [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Grund09a,
       author = {Daniel Grund and Jan Reineke and Gernot Gebhard},
       title = {Branch Target Buffers: {WCET} Analysis and Timing Predictability},
       booktitle = {15th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2009},
       year = {2009},
       month = {August},
       doi = {10.1109/RTCSA.2009.8},
       slides = {http://rw4.cs.uni-saarland.de/~grund/talks/rtcsa09-btb.pdf},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/rtcsa09-BTBs.pdf}
     }

48. Sound and Efficient WCET Analysis in the Presence of Timing Anomalies
    J. Reineke, and R. Sen
    WCET, 2009. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Reineke09,
       author = {Jan Reineke and Rathijit Sen},
       title = {Sound and Efficient {WCET} Analysis in the Presence of Timing Anomalies},
       booktitle = {Proceedings of 9th International Workshop on Worst-Case Execution Time ({WCET}) Analysis},
       year = {2009},
       month = {June},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/preciseAndEfficientTimingAnomaliesWCET09.pdf},
       url = {http://rw4.cs.uni-saarland.de/~reineke/publications/TimingAnomaliesWCET09.pdf}
     }

49. Cache-Related Preemption Delay Computation for Set-Associative Caches—Pitfalls and Solutions
    C. Burguière, J. Reineke, and S. Altmeyer
    WCET, 2009. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Burguiere09,
       author = {Claire Burgui\`ere and Jan Reineke and Sebastian Altmeyer},
       title = {Cache-Related Preemption Delay Computation for Set-Associative Caches---Pitfalls and Solutions},
       booktitle = {Proceedings of 9th International Workshop on Worst-Case Execution Time ({WCET}) Analysis},
       year = {2009},
       month = {June},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/CRPDPitfallsWCET09.pdf},
       url = {http://drops.dagstuhl.de/opus/volltexte/2009/2285/pdf/Burguiere.2285.pdf}
     }

50. Making Dynamic Memory Allocation Static To Support WCET Analyses
    J. Herter, and J. Reineke
    WCET, 2009. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Herter09,
       author = {J\"org Herter and Jan Reineke},
       title = {Making Dynamic Memory Allocation Static To Support {WCET} Analyses},
       booktitle = {Proceedings of 9th International Workshop on Worst-Case Execution Time ({WCET}) Analysis},
       year = {2009},
       month = {June},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/makingDynamicAllocationStaticWCET09.pdf},
       url = {http://drops.dagstuhl.de/opus/volltexte/2009/2284/pdf/Herter.2284.pdf}
     }

51. Designing Predictable Multicore Architectures for Avionics and Automotive Systems
    R. Wilhelm, C. Ferdinand, C. Cullmann, D. Grund, J. Reineke, and B. Triquet
    Workshop on Reconciling Performance with Predictability (RePP), 2009. [pdf]  [bib]
    

    @INPROCEEDINGS{Wilhelm09b,
       author = {Reinhard Wilhelm and Christian Ferdinand and Christoph Cullmann and Daniel Grund and Jan Reineke and Beno\^it Triquet},
       title = {Designing Predictable Multicore Architectures for Avionics and Automotive Systems},
       booktitle = {Workshop on Reconciling Performance with Predictability ({RePP})},
       year = {2009},
       month = {October},
       url = {http://www.tik.ee.ethz.ch/~jchen/RePP/papers/2-3.pdf}
     }

52. Estimating the Performance of Cache Replacement Policies
    D. Grund, and J. Reineke
    MEMOCODE, 2008. [doi]  [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Grund08,
       author = {Daniel Grund and Jan Reineke},
       title = {Estimating the Performance of Cache Replacement Policies},
       booktitle = {MEMOCODE '08: Proceedings of the 6th IEEE/ACM International Conference on Formal Methods and Models for Codesign},
       year = {2008},
       pages = {101--111},
       month = {June},
       doi = {10.1109/MEMCOD.2008.4547695},
       slides = {http://rw4.cs.uni-saarland.de/~grund/talks/memocode08-policy_performance.pdf},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/memocode08-policy_performance.pdf}
     }

53. Relative Competitiveness of Cache Replacement Policies
    J. Reineke, and D. Grund
    SIGMETRICS, 2008. [doi]  [pdf]  [bib]
    

    @INPROCEEDINGS{Reineke08b,
       author = {Jan Reineke and Daniel Grund},
       title = {Relative Competitiveness of Cache Replacement Policies},
       booktitle = {SIGMETRICS '08: Proceedings of the 2008 ACM SIGMETRICS international conference on Measurement and modeling of computer systems},
       year = {2008},
       pages = {431--432},
       address = {New York, NY, USA},
       month = {June},
       publisher = {ACM},
       doi = {10.1145/1375457.1375506},
       isbn = {978-1-60558-005-0},
       location = {Annapolis, MD, USA},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/sigmetrics08-rel_comp.pdf}
     }

54. Relative Competitive Analysis of Cache Replacement Policies
    J. Reineke, and D. Grund
    LCTES, 2008. [doi]  [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Reineke08c,
       author = {Jan Reineke and Daniel Grund},
       title = {Relative Competitive Analysis of Cache Replacement Policies},
       booktitle = {LCTES '08: Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems},
       year = {2008},
       pages = {51--60},
       address = {New York, NY, USA},
       month = {June},
       publisher = {ACM},
       doi = {10.1145/1375657.1375665},
       isbn = {978-1-60558-104-0},
       location = {Tucson, AZ, USA},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/relativeCompetitiveAnalysisLCTES08.pdf},
       url = {http://rw4.cs.uni-saarland.de/~grund/papers/lctes08-rel_comp.pdf}
     }

55. CAMA: Cache-Aware Memory Allocation for WCET Analysis
    J. Herter, J. Reineke, and R. Wilhelm
    Work-In-Progress Session of ECRTS, 2008. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Herter08a,
       author = {J\"org Herter and Jan Reineke and Reinhard Wilhelm},
       title = {{CAMA}: Cache-Aware Memory Allocation for {WCET} Analysis},
       booktitle = {Proceedings Work-In-Progress Session of the 20th Euromicro Conference on Real-Time Systems},
       year = {2008},
       editor = {Marco Caccamo},
       pages = {24--27},
       month = {July},
       slides = {http://rw4.cs.uni-saarland.de/~jherter/talks/ecrtswip08.pdf},
       url = {http://rw4.cs.uni-saarland.de/~jherter/papers/camaecrts08.pdf}
     }

56. Shape Analysis of Sets
    J. Reineke
    Workshop Trustworthy Software 2006, 2006. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Reineke06,
       author = {Jan Reineke},
       title = {Shape Analysis of Sets},
       booktitle = {Workshop Trustworthy Software 2006},
       year = {2006},
       editor = {Serge Autexier and Stephan Merz and Leon van der Torre and Reinhard Wilhelm and Pierre Wolper},
       address = {Dagstuhl, Germany},
       publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik
     	(IBFI), Schloss Dagstuhl, Germany},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/shapeAnalysisOfSets.pdf},
       url = {http://drops.dagstuhl.de/opus/volltexte/2006/698/pdf/06000.ReinekeJan.Paper.698.pdf}
     }

57. A Definition and Classification of Timing Anomalies
    J. Reineke, B. Wachter, S. Thesing, R. Wilhelm, I. Polian, J. Eisinger, and B. Becker
    WCET, 2006. [pdf]  [slides]  [bib]
    

    @INPROCEEDINGS{Reineke06b,
       author = {Jan Reineke and Bj\"orn Wachter and Stephan Thesing and Reinhard Wilhelm and Ilia Polian and Jochen Eisinger and Bernd Becker},
       title = {A Definition and Classification of Timing Anomalies},
       booktitle = {Proceedings of 6th International Workshop on Worst-Case Execution Time ({WCET}) Analysis},
       year = {2006},
       month = {July},
       slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/timingAnomaliesWCET06.ppt},
       url = {http://rw4.cs.uni-saarland.de/~reineke/publications/TimingAnomaliesWCET06.pdf}
     }

1. Keeping up with Real Time
   R. Wilhelm, J. Reineke, and S. Wegener
   Advances in Aeronautical Informatics, 2018. [doi]  [bib]
   

   @incollection{Wilhelm18,
     author    = {Reinhard Wilhelm and
                  Jan Reineke and
                  Simon Wegener},
     title     = {Keeping up with Real Time},
     booktitle = {Advances in Aeronautical Informatics, Technologies Towards Flight
                  4.0.},
     pages     = {121--133},
     year      = {2018},
     url       = {https://doi.org/10.1007/978-3-319-75058-3_9},
     doi       = {10.1007/978-3-319-75058-3_9},
   }

2. Static Timing Analysis - What is Special?
   J. Reineke and R. Wilhelm
   Semantics, Logics, and Calculi, 2016. [doi]  [url]  [bib]
   

   @inproceedings{Reineke16,
     author    = {Jan Reineke and
                  Reinhard Wilhelm},
     title     = {Static Timing Analysis - What is Special?},
     booktitle = {Semantics, Logics, and Calculi - Essays Dedicated to Hanne Riis Nielson
                  and Flemming Nielson on the Occasion of Their 60th Birthdays},
     pages     = {74--87},
     year      = {2016},
     url       = {http://embedded.cs.uni-saarland.de/publications/TimingAnalysisWhatIsSpecial2016.pdf},
     doi       = {10.1007/978-3-319-27810-0_4},
   }

3. Toward Compact Abstractions for Processor Pipelines
   S. Hahn, J. Reineke, and R. Wilhelm
   Correct System Design, 2015. [doi]  [pdf]  [bib]
   

   @inproceedings{Hahn15b,
     author    = {Sebastian Hahn and
                  Jan Reineke and
                  Reinhard Wilhelm},
     title     = {Toward Compact Abstractions for Processor Pipelines},
     booktitle = {Correct System Design - Symposium in Honor of Ernst-R{\"{u}}diger
                  Olderog on the Occasion of His 60th Birthday, Oldenburg, Germany,
                  September 8-9, 2015. Proceedings},
     editor={Meyer, Roland and Platzer, André and Wehrheim, Heike},
     pages     = {205--220},
     year      = {2015},
     url       = {http://dx.doi.org/10.1007/978-3-319-23506-6_14},
     doi       = {10.1007/978-3-319-23506-6_14},
   }

4. Impact of Resource Sharing on Performance and Performance Prediction: A Survey (invited paper, extended abstract)
   J. Reineke and R. Wilhelm
   DATE, 2014. [bib]
   

   @INPROCEEDINGS{Reineke14d,
       author = {Jan Reineke and Reinhard Wilhelm},
       title = {Impact of Resource Sharing on Performance and Performance Prediciton: A Survey},
     booktitle={Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014},
     pages={1--2},
     year={2014},
     organization={IEEE},
     month={March}
   }
   

5. Reverse Engineering of Cache Replacement Policies in Intel Microprocessors and Their Evaluation (poster abstract)
   A. Abel, J. Reineke
   ISPASS, 2014. [pdf]  [bib]
   

   @INPROCEEDINGS{Abel14,
      author = {Andreas Abel and Jan Reineke},
      title = {Reverse Engineering of Cache Replacement Policies in Intel Microprocessors and Their Evaluation},
      booktitle = {2014 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)},
      year = {2014},
      month = {March},
      pages= {141-142},
      url = {http://embedded.cs.uni-saarland.de/publications/ISPASS14.pdf}
    }

6. Designing next-generation real-time streaming systems
   S. Stuijk, T. Basten, B. Akesson, M. Geilen, O. Moreira, J. Reineke
   CODES+ISSS, 2011. [doi] [bib]
   

   @INPROCEEDINGS{Stuijk11,
      author = {Sander Stuijk and Twan Basten and Benny Akesson and Marc Geilen and Orlando Moreira and Jan Reineke},
      title = {Designing next-generation real-time streaming systems},
      booktitle = {CODES+ISSS},
      year = {2011},
    }

7. Polynomial Precise Interval Analysis Revisited
   T. Gawlitza, J. Leroux, J. Reineke, H. Seidl, G. Sutre, and R. Wilhelm
   Efficient Algorithms, 2009. [doi]  [pdf]  [bib]
   

   @INPROCEEDINGS{Gawlitza09,
      author = {Thomas Gawlitza and J\'er\^ome Leroux and Jan Reineke and Helmut Seidl and Gr\'egoire Sutre and Reinhard Wilhelm},
      title = {Polynomial Precise Interval Analysis Revisited},
      booktitle = {Efficient Algorithms},
      year = {2009},
      pages = {422--437},
      doi = {10.1007/978-3-642-03456-5_28},
      url = {http://hal.archives-ouvertes.fr/docs/00/41/47/50/PDF/2009.Gawlitza.EA.pdf}
    }

1. Spectector: Principled Detection of Speculative Information Flows
   Marco Guarnieri, Boris Köpf, Jose F. Morales, Jan Reineke, and Andres Sanchez
   arXiv, December, 2018. [web] [bib]
   

   @article{Guarnieri18,
     author    = {Marco Guarnieri and
                  Boris K{\"{o}}pf and
                  Jos{\'{e}} F. Morales and
                  Jan Reineke and
                  Andr{\'{e}}s S{\'{a}}nchez},
     title     = {{SPECTECTOR:} Principled Detection of Speculative Information Flows},
     journal   = {CoRR},
     volume    = {abs/1812.08639},
     year      = {2018},
     url       = {http://arxiv.org/abs/1812.08639},
     archivePrefix = {arXiv},
     eprint    = {1812.08639},
     timestamp = {Wed, 02 Jan 2019 14:40:18 +0100},
     biburl    = {https://dblp.org/rec/bib/journals/corr/abs-1812-08639},
     bibsource = {dblp computer science bibliography, https://dblp.org}
   }

2. Analysis of Write-back Caches under Fixed-priority Preemptive and Non-preemptive Scheduling
   R. I. Davis, S. Altmeyer, and J. Reineke
   Technical Report, Dept. Computer Science, University of York, 2016. [pdf]  [bib]
   

   @techreport{Davis16b,
     author    = {Robert I. Davis and
     			   Sebastian Altmeyer and
                  Jan Reineke},
     title     = {Analysis of Write-back Caches under Fixed-priority Preemptive and Non-preemptive Scheduling},
     institution = {Dept. Computer Science, University of York},
     URL		= {https://www.cs.york.ac.uk/ftpdir/reports/2016/YCS/502/YCS-2016-502.pdf},
     year      = {2016},
   }

3. A Generic and Compositional Framework for Multicore Response Time Analysis
   S. Altmeyer, R. I. Davis, L. S. Indrusiak, C. Maiza, V. Nelis, and J. Reineke
   Technical Report, Dept. Computer Science, University of York, 2015. [pdf]  [bib]
   

   @techreport{Altmeyer15r,
     author    = {Sebastian Altmeyer and
                  Robert I. Davis and
                  Leandro Soares Indrusiak and
                  Claire Maiza and
                  Vincent N{\'{e}}lis and
                  Jan Reineke},
     title     = {A generic and compositional framework for multicore response time
                  analysis},
     institution = {Dept. Computer Science, University of York},
     URL		= {https://www.cs.york.ac.uk/ftpdir/reports/2015/YCS/499/YCS-2015-499.pdf},
     year      = {2015},
   }

4. Basic Problems in Multi-View Modeling
   J. Reineke, and S. Tripakis
   EECS Department, University of California, Berkeley, Technical Report No. UCB/EECS-2014-4, January 2014. [pdf]  [bib]
   

   @techreport{Reineke14c,
       Author = {Reineke, Jan and Tripakis, Stavros},
       Title = {Basic Problems in Multi-View Modeling},
       Institution = {EECS Department, University of California, Berkeley},
       Year = {2014},
       Month = {Jan},
       URL = {http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-4.html},
       Number = {UCB/EECS-2014-4},
       Abstract = {Modeling all aspects of a complex system within a single model is a difficult, if not impossible, task. Multi-view modeling is a methodology where different aspects of the system are captured by different models, or views. A key question then is consistency: if different views of a system have some degree of overlap, how can we guarantee that they are consistent, i.e., that they do not contradict each other? In this paper we formulate this and other basic problems in multi-view modeling within an abstract formal framework. We then instantiate this framework in a discrete, finite-state system setting, and study how some key verification and synthesis problems can be solved in that setting.}
   }
   

5. CacheAudit: A Tool for the Static Analysis of Cache Side Channels
   G. Doychev, D. Feld, B. Köpf, L. Mauborgne, and J. Reineke
   Cryptology ePrint Archive, Report 2013/253, May 2013. [pdf]  [bib]
   

   @misc{Doychev13,
       author = {Goran Doychev and Dominik Feld and Boris Köpf and Laurent Mauborgne and Jan Reineke},
       title = {CacheAudit: A Tool for the Static Analysis of Cache Side Channels},
       howpublished = {Cryptology ePrint Archive, Report 2013/253},
       year = {2013},
       note = {\url{http://eprint.iacr.org/}},
       pdf = {http://eprint.iacr.org/2013/253.pdf},
   }
   

6. Precise Modelling of Instruction Cache Behaviour
   S. Andalam, R. Sinha, P. Roop, A. Girault, and J. Reineke
   Technical Report, INRIA, January 2013. [pdf]  [bib]
   

   @techreport{Andalam13b,
       hal_id = {hal-00781566},
       url = {http://hal.inria.fr/hal-00781566},
       title = {Precise Modelling of Instruction Cache Behaviour},
       author = {Andalam, Sidharta and Sinha, Roopak and Roop, Partha S. and Girault, Alain and Reineke, Jan},
       abstract = {{Safety critical real-time applications in aviation, automotive and industrial automation have to guarantee not only the functionality, but also the timeliness of the results. Here, a deadline is associated with the software tasks, and a failure to complete prior to this deadline could lead to a catastrophic consequences. Hence, for the correctness of real-time systems, it is essential to be able to compute the worst case execution time (WCET) of the tasks in order to guarantee their deadlines. However, the problem of WCET analysing is difficult, because of processors use cache-based memory systems that vary memory access time significantly. Any pessimistic estimation of the number of cache hits/misses will result in loose precision of the WCET analyses, which could lead to over use of hardware resources. In this paper, we present a new approach for statically analysing the behaviour of instructions on a direct mapped cache. The proposed approach combines binary representation and a new abstraction that reduces the analysis time without sacrificing the precision. This is unlike the existing cache analysing approaches where either precision or scalability (analysis time) is sacrificed. Experimental results are presented that demonstrate the practical applicability of this analysis.}},
       keywords = {Instruction Cache Analysis, WCET, worst case execution analysis, direct mapped cache.},
       language = {Anglais},
       affiliation = {Robotics and Embedded Systems [M{\"u}nchen] , Department of Electrical and Computer Engineering [Auckland ] - ECE , SPADES - Inria Grenoble Rh{\^o}ne-Alpes , Compiler Design Lab},
       pages = {62 p.},
       type = {Rapport de recherche},
       institution = {INRIA},
       number = {RR-8214},
       year = {2013},
       month = Jan,
       pdf = {http://hal.inria.fr/hal-00781566/PDF/CacheAnalysisINRIAtechreport.pdf},
   }
   

7. Building Timing Predictable Embedded Systems
   P. Axer, R. Ernst, H. Falk, A. Girault, D. Grund, N. Guan, B. Jonsson, P. Marwedel, J. Reineke, C. Rochange, M. Sebastian, R. von Hanxleden, R. Wilhelm, W. Yi
   Technical Report, Uppsala University, July 2012. [pdf]  [bib]
   

   @TECHREPORT{Falk12,
      author = {Philip Axer and Rolf Ernst and Heiko Falk and Alain Girault and Daniel Grund and Nan Guan and Bengt Jonsson and Peter Marwedel and Jan Reineke and Christine Rochange and Maurice Sebastian and Reinhard von Hanxleden and Reinhard Wilhelm and Wang Yi},
      title = {Building Timing Predictable Embedded Systems},
      institution = {Uppsala University, Department of Information Technology},
      year = {2012},
      month = {July},
      url = {http://www.it.uu.se/research/publications/reports/2012-013/2012-013-nc.pdf}
    }

8. Sensitivity of Cache Replacement Policies
   J. Reineke, and D. Grund
   Technical Report, SFB/TR 14 AVACS, 2008. [pdf]  [bib]
   

   @TECHREPORT{Reineke08a,
      author = {Jan Reineke and Daniel Grund},
      title = {Sensitivity of Cache Replacement Policies},
      institution = {SFB/TR 14 AVACS},
      year = {2008},
      type = {Reports of SFB/TR 14 AVACS},
      number = {36},
      month = {March},
      note = {ISSN: 1860-9821, http://www.avacs.org},
      access = {open},
      bibtex = {atr036.bib},
      editor = {Bernd Becker and Werner Damm and Martin Fr\"anzle and Ernst-R\"udiger Olderog and Andreas Podelski and Reinhard Wilhelm},
      series = {ATR},
      subproject = {R2},
      url = {http://www.avacs.org/Publikationen/Open/avacs_technical_report_036.pdf}
    }

9. Polynomial Precise Interval Analysis Revisited
   T. Gawlitza, J. Reineke, H. Seidl, and R. Wilhelm
   Technical Report, TU München, Germany, 2006. [bib]
   

   @TECHREPORT{Gawlitza06,
      author = {Thomas Gawlitza and Jan Reineke and Helmut Seidl and Reinhard Wilhelm},
      title = {Polynomial Precise Interval Analysis Revisited},
      institution = {TU M\"unchen, Germany},
      year = {2006},
    }

10. Predictability of Cache Replacement Policies
    J. Reineke, D. Grund, C. Berg, and R. Wilhelm
    Technical Report, SFB/TR 14 AVACS, 2006. [pdf]  [bib]
    

    @TECHREPORT{Reineke06a,
       author = {Jan Reineke and Daniel Grund and Christoph Berg and Reinhard Wilhelm},
       title = {Predictability of Cache Replacement Policies},
       institution = {SFB/TR 14 AVACS},
       year = {2006},
       type = {Reports of SFB/TR 14 AVACS},
       number = {9},
       month = {September},
       note = {ISSN: 1860-9821, http://www.avacs.org},
       access = {open},
       bibtex = {atr009.bib},
       editor = {Bernd Becker and Werner Damm and Martin Fr\"anzle and Ernst-R\"udiger Olderog and Andreas Podelski and Reinhard Wilhelm},
       series = {ATR},
       subproject = {R2},
       url = {http://www.avacs.org/Publikationen/Open/avacs_technical_report_009.pdf}
     }

1. Caches in WCET Analysis
   J. Reineke
   Universität des Saarlandes, 2008. [pdf]  [slides]  [bib]
   

   @PHDTHESIS{Reineke08,
      author = {Jan Reineke},
      title = {Caches in {WCET} Analysis},
      school = {Universit\"at des Saarlandes},
      year = {2008},
      month = {November},
      slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/phdDefenseReineke.pdf},
      url = {http://rw4.cs.uni-saarland.de/~reineke/publications/DissertationCachesInWCETAnalysis.pdf}
    }

MSc Thesis

1. Array-aware Cache Analysis for Write-through and Write-back Caches
   T. Blaß
   Universität des Saarlandes, Germany, 2016. [pdf]  [bib]
   

   @MASTERSTHESIS{Blass16,
      author = {Tobias Blaß},
      title = {Array-aware Cache Analysis for Write-through and Write-back Caches},
      school = {Universit\"at des Saarlandes, Germany},
      year = {2016},
      month = {December},
      url = {http://embedded.cs.uni-saarland.de/publications/ThesisBlass2016.pdf}
    }

2. Evaluating compositional timing analyses
   C. Faymonville
   Universität des Saarlandes, Germany, 2015. [pdf]  [bib]
   

   @MASTERSTHESIS{Faymonville15,
      author = {Claus Faymonville},
      title = {Evaluating Compositional timing analyses},
      school = {Universit\"at des Saarlandes, Germany},
      year = {2015},
      month = {September},
      url = {http://embedded.cs.uni-saarland.de/publications/ThesisFaymonville2015.pdf}
    }

3. Defining Compositionality in Execution Time Analysis
   S. Hahn
   Universität des Saarlandes, Germany, 2014. [pdf]  [bib]
   

   @mastersthesis{Hahn14,
     author = {Sebastian Hahn},
     title = {Defining Compositionalty in Execution Time Analysis},
     school = {Universit\"at des Saarlandes, Germany},
     year = {2014},
     type = {Master's Thesis}
   }

4. Measurement-based Inference of the Cache Hierarchy
   A. Abel
   Universität des Saarlandes, Germany, 2012. [pdf]  [bib]
   

   @mastersthesis{Abel12b,
      title={Measurement-based Inference of the Cache Hierarchy},
      author={Andreas Abel},
      year={2012},
      school={Universit\"at des Saarlandes, Germany},
      url = {http://embedded.cs.uni-saarland.de/literature/AndreasAbelMastersThesis.pdf},
   }

5. Shape Analysis of Sets
   J. Reineke
   Universität des Saarlandes, Germany, 2005. [pdf]  [slides]  [bib]
   

   @MASTERSTHESIS{Reineke05,
      author = {Jan Reineke},
      title = {Shape Analysis of Sets},
      school = {Universit\"at des Saarlandes, Germany},
      year = {2005},
      month = {June},
      slides = {http://rw4.cs.uni-saarland.de/~reineke/talks/shapeAnalysisOfSets.pdf},
      url = {http://drops.dagstuhl.de/opus/volltexte/2006/698/pdf/06000.ReinekeJan.Other.698.pdf}
    }